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LTM4606
APPLICATIONS INFORMATION
Table 3. 1.5V Output
DERATING CURVE
Figures 8, 10
Figures 8, 10
Figures 8, 10
Figures 9, 11
Figures 9, 11
Figures 9, 11
V IN (V)
5, 12
5, 12
5, 12
5, 12
5, 12
5, 12
POWER LOSS CURVE
Figure 6
Figure 6
Figure 6
Figure 6
Figure 6
Figure 6
AIR FLOW (LFM)
0
200
400
0
200
400
HEAT SINK
None
None
None
BGA Heat Sink
BGA Heat Sink
BGA Heat Sink
θ JA (°C/W)
13.5
10
9
9.5
7
5
Table 4. 3.3V Output
DERATING CURVE
Figures 12, 14
Figures 12, 14
Figures 12, 14
Figures 13, 15
Figures 13, 15
Figures 13, 15
V IN (V)
12, 24
12, 24
12, 24
12, 24
12, 24
12, 24
POWER LOSS CURVE
Figure 7
Figure 7
Figure 7
Figure 7
Figure 7
Figure 7
AIR FLOW (LFM)
0
200
400
0
200
400
HEAT SINK
None
None
None
BGA Heat Sink
BGA Heat Sink
BGA Heat Sink
θ JA (°C/W)
13.5
11
10
10
7
5
Heat Sink Manufacturer
AAVID Thermalloy
Cool Innovations
PART NUMBER
375424B00034G
4-050503P to 4-050508P
WEBSITE
www.aavidthermalloy.com
www.cooinnovations.com
C IN
C IN
Layout Checklist/Example
The high integration of LTM4606 makes the PCB board
layout very simple and easy. However, to optimize its
electrical and thermal performance, some layout con-
siderations are still necessary.
? Use large PCB copper areas for high current path, in -
cluding V IN , PGND and V OUT . It helps to minimize the
PCB conduction loss and thermal stress.
? Place high frequency ceramic input and output capaci -
tors next to the V D , PGND and V OUT pins to minimize
high frequency noise.
? Place a dedicated power ground layer underneath the
unit.
? Use a separated SGND ground copper area for com -
ponents connected to signal pins. Connect the SGND
to PGND underneath the unit.
? Place one or more high frequency ceramic capacitors
close to the connection into the system board.
Figure 17 gives a good example of the recommended layout.
V IN
PGND
SIGNAL
GND
? Use round corners for the PCB copper layer to minimize
the radiated noise.
C OUT
C OUT
? To minimize the EMI noise and reduce module thermal
stress, use multiple vias for interconnection between
top layer and other power layers on different locations.
? Do not put vias directly on pads, unless they are capped.
V OUT
(LGA Shown, for BGA Use Circle Pads)
Figure 17. Recommended PCB Layout
4606 F17
4606fd
For more information www.linear.com/LTM4606
19
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